رسائل ماجيستير
English
2019
Design and Implementation of a Real–Time Field Programable Gate Array Based Orthogonal Frequency Division Multiplexing Transceiver
أحمد نجاح جبار, ابراهيم عبدالله مرداس, غدير حيدر اسكندر
كلية الهندسة-جامعة بابل · العراق
The communication systems are playing a major role in modern societies by connecting the people around the world. Therefore, reliable stable and dependable links are required. The excess demands for higher bitrates gave birth for the new technology in communication which is called 5G (fifth Generation). This generation promised to provide, theoretically, to transport huge data loadswith minimum delays and power requirements.Unfortunately, the Orthogonal Frequency Division Multiplexing (OFDM) is excluded from the 5G despite its long service time and reputation. The exclusion is due to the inherited complexities and time delays of the OFDM that comes from the nature of the Fast Fourier Transform circuit and its Inverse (FFT/IFFT). These problems prevented the OFDM from further participation in the 5G as these problems contradicts the 5G foundation requirements.This thesis suggests that the OFDM can still be a qualified competitor to other suggested 5G system if the FFT/IFFT are redesigned based on a full parallel architecture. To accomplishes this parallelism, it is necessary to reinventthe FFT/IFFTfrom ground zero benefittingfrom itssymmetry and recurrence. Thus, a new algorithm which is MultiRadix FFT (MRFFT) was invented that adoptedthe adaptive radix increment in the construction of FFTrather than fixed radix. This algorithm ensures the need for only 2 stages to complete the transformationfor anynumber ofpointsusing MRFFTresulting into: it requiresthe least time to complete the transformation, least complexity, minimum fabrication space and lowest consumed power for operation. This algorithm was used to design a 16 FFT circuit andby comparingthe results against the theoretical FFT, MRFFT showed that it can operate almost exactly as the theoretical FFT. The MRFFT in this thesis operates on 100 MHz clock, 32 bits fixed point number and 16 subcarriers at the output. Therefore, MRFFT, here, operates at 51.2 Gbit/sec for the real and imaginary part with total 102.4 Gbit/sec. The other addition to the OFDM system proposed by the thesis is a new design for the QAM MODulator DEModulator (MODEM)to operate in parallel mode with minimum hardware requirements.The new design will work independently of constellation size which allows the system to increase its data rate without any added time delays.The new MODEM operates with bit rate equals to 320 Mb/sec for the real and imaginary and total bitrate equals to 640 Mbit/sec.
The final parallel OFDM is tested under the effect of Additive White Gaussian Noise and the Multipath fading channel by transmitting 106 symbols over an emulated channel. The performance exceeds by all measures the currently know commercial OFDM system due the inherited speed after implementing the parallel data processing in the design. After confirming the validity of operation, the system is implemented on an FPGA card, Arty A7 35T, and used to transmit a gray scale photo.An extra contribution presented by this thesis, is the design of achannelemulator to induce the effect of areal nonlinear channel using FPGA card. All the design steps and the necessary theories and calculations are discussed thoroughly to enable any user to upgrade or modify the channel according to the project’s needs.The final design is simple, friendly to use and inexpensive which allows it to be the first choice for any channel nonlinearity test